/**
  @page SYSCFG_PVD Programmable Voltage Detector (PVD) example
  
  @verbatim
  ******************** (C) COPYRIGHT 2014 STMicroelectronics *******************
  * @file    SYSCFG/SYSCFG_PVD/readme.txt 
  * @author  MCD Application Team
  * @version V1.4.0
  * @date    24-July-2014
  * @brief   Description of the Programmable Voltage Detector (PVD) example.
  ******************************************************************************
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
   @endverbatim

@par Example Description 

This example shows how to configure the programmable voltage detector.

In this example:
  - TIM1 is configured to generate a PWM signal on pin PA.08.
  - PVD threshold is configured to level 5.
   
While Vdd is higher than the PVD threshold (~2.68 V), PWM signal is displayed on PA.08.
While Vdd is lower than the PVD threshold (~2.58 V), PA8 is in low level.

@note   Refer to the electrical characteristics of your device datasheet for more
        details about the voltage threshold corresponding to each PVD detection level.


@par Directory contents 

  - SYSCFG/PVD/stm32f0xx_conf.h    Library Configuration file
  - SYSCFG/PVD/stm32f0xx_it.c      Interrupt handlers
  - SYSCFG/PVD/stm32f0xx_it.h      Interrupt handlers header file
  - SYSCFG/PVD/main.c              Main program
  - SYSCFG/PVD/main.h              Header for main.c module
  - SYSCFG/PVD/system_stm32f0xx.c  STM32F0xx system source file
  
@note The "system_stm32f0xx.c" is generated by an automatic clock configuration 
      tool and can be easily customized to meet user application requirements. 
      To select different clock setup, use the "STM32F0xx_Clock_Configuration_VX.Y.Z.xls" 
      provided with the AN4055 package available on <a href="http://www.st.com/internet/mcu/class/1734.jsp">  ST Microcontrollers </a>

         
@par Hardware and Software environment

  - This example runs on STM32F0xx devices.
  
  - This example has been tested with STMicroelectronics STM320518-EVAL and
    STM32072B-EVAL including respectively STM32F051R8T6 and STM32F072VBT6 devices
    and can be easily tailored to any other supported device and development board

  - STM320518-EVAL Set-up
    - Use RV2 Potentiometer to adjust Vdd.
    - Make sure that jumper JP9 is in position(VDD_ADJ).
    - Connect an oscilloscope to PA.08 pin to display the waveform.
    
  - STM32072B-EVAL Set-up 
    - Use RV2 Potentiometer to adjust Vdd.
    - Make sure that jumper JP13 is in position(VDD_ADJ).
    - Connect an oscilloscope to PA.08 pin to display the waveform.


@par How to use it ? 

In order to make the program work, you must do the following :
 - Copy all source files from this example folder to the template folder under
   Project\STM32F0xx_StdPeriph_Templates
 - Open your preferred toolchain 
 - Rebuild all files and load your image into target memory
 - Run the example

 * <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
 */
